riscv_submodules.h File Reference

Modules

module riscv_csrs_minimal	(	clock	clk,
		input bit	reset_n,
		input t_riscv_irqs	irqs,
		input t_riscv_csr_access	csr_access,
		input t_riscv_word	csr_write_data,
		output t_riscv_csr_data	csr_data,
		input t_riscv_csr_controls	csr_controls,
		output t_riscv_csrs_minimal	csrs
	)

Parameters

clk	RISC-V clock
reset_n	Active low reset
irqs	Interrupts in to the CPU
csr_access	RISC-V CSR access, combinatorially decoded
csr_write_data	Write data for the CSR access, later in the cycle than possibly
csr_data	CSR response (including take interrupt and read data), from the current csr_access
csr_controls	Control signals to update the CSRs
csrs	CSR values

module riscv_e32_decode	(	input t_riscv_i32_inst	instruction,
		output t_riscv_i32_decode	idecode,
		input t_riscv_config	riscv_config
	)

module riscv_e32c_decode	(	input t_riscv_i32_inst	instruction,
		output t_riscv_i32_decode	idecode,
		input t_riscv_config	riscv_config
	)

module riscv_i32_alu	(	input t_riscv_i32_decode	idecode,
		input t_riscv_word	pc,
		input t_riscv_word	rs1,
		input t_riscv_word	rs2,
		output t_riscv_i32_alu_result	alu_result
	)

module riscv_i32_decode	(	input t_riscv_i32_inst	instruction,
		output t_riscv_i32_decode	idecode,
		input t_riscv_config	riscv_config
	)

module riscv_i32_muldiv	(	clock	clk,
		input bit	reset_n,
		input t_riscv_i32_coproc_controls	coproc_controls,
		output t_riscv_i32_coproc_response	coproc_response,
		input t_riscv_config	riscv_config
	)

module riscv_i32c_decode	(	input t_riscv_i32_inst	instruction,
		output t_riscv_i32_decode	idecode,
		input t_riscv_config	riscv_config
	)