CDL Modules
|
Files | |
file | apb_master_axi.cdl |
AXI target to an APB master interface. | |
module apb_master_axi::apb_master_axi | ( | clock | aclk, |
input bit | areset_n, | ||
input t_axi_request | ar, | ||
output bit | awready, | ||
input t_axi_request | aw, | ||
output bit | arready, | ||
output bit | wready, | ||
input t_axi_write_data | w, | ||
input bit | bready, | ||
output t_axi_write_response | b, | ||
input bit | rready, | ||
output t_axi_read_response | r, | ||
output t_apb_request | apb_request, | ||
input t_apb_response | apb_response | ||
) |
[in] | apb_response | AXI target mapping to an APB master |
This is a very simple AXI target that handles a single AXI transaction at any one time; it converts this into an APB read or write transaction, whose completion allows the completion of the AXI transaction.
This module is currently very primitive, and does not checking of transaction input really.