CDL Modules
Data Structures | Namespaces | Enumerations
apb_master_axi.cdl File Reference

AXI target to an APB master interface. More...

Detailed Description

AXI target to an APB master interface.

The AXI target supports 32-bit aligned 32-bit read/writes with full byte enables only.

Other transactions should return a slave error response (but they don't as yet)

The AXI target supports 32-bit aligned 32-bit read/writes with full byte enables only.

Other transactions return a slave error response

VGA CSRs are not being written to

Add rotary inputs

Add PS/2 inputs

Data Structures

struct  apb_master_axi::t_axi_wr_state
 
struct  apb_master_axi::t_axi_rd_state
 

Namespaces

 apb_master_axi
 

Enumerations

enum  apb_master_axi::t_axi_wr_fsm {
  apb_master_axi::axi_wr_idle,
  apb_master_axi::axi_wr_get_data,
  apb_master_axi::axi_wr_do_apb,
  apb_master_axi::axi_wr_wait_apb,
  apb_master_axi::axi_wr_wait_ack
}
 
enum  apb_master_axi::t_axi_rd_fsm {
  apb_master_axi::axi_rd_idle,
  apb_master_axi::axi_rd_do_apb,
  apb_master_axi::axi_rd_wait_apb,
  apb_master_axi::axi_rd_wait_ack
}