CDL Modules
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SRAM modules used by all the modules. More...
SRAM modules used by all the modules.
Copyright (C) 2016-2017, Gavin J Stark. All rights reserved.
Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
Data Structures | |
struct | t_sram_access_req |
struct | t_sram_access_resp |
struct t_sram_access_req |
module se_sram_mrw_2_16384x48 | ( | clock | sram_clock_0, |
input bit | select_0, | ||
input bit | address_0[14], | ||
input bit | read_not_write_0, | ||
input bit | write_data_0[48], | ||
output bit | data_out_0[48], | ||
clock | sram_clock_1, | ||
input bit | select_1, | ||
input bit | address_1[14], | ||
input bit | read_not_write_1, | ||
input bit | write_data_1[48], | ||
output bit | data_out_1[48] | ||
) |
module se_sram_mrw_2_16384x8 | ( | clock | sram_clock_0, |
input bit | select_0, | ||
input bit | address_0[14], | ||
input bit | read_not_write_0, | ||
input bit | write_data_0[8], | ||
output bit | data_out_0[8], | ||
clock | sram_clock_1, | ||
input bit | select_1, | ||
input bit | address_1[14], | ||
input bit | read_not_write_1, | ||
input bit | write_data_1[8], | ||
output bit | data_out_1[8] | ||
) |
module se_sram_srw_128x45 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[7], | ||
input bit | read_not_write, | ||
input bit | write_data[45], | ||
output bit | data_out[45] | ||
) |
module se_sram_srw_128x64 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[7], | ||
input bit | read_not_write, | ||
input bit | write_enable, | ||
input bit | write_data[64], | ||
output bit | data_out[64] | ||
) |
module se_sram_srw_16384x32 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[14], | ||
input bit | write_enable, | ||
input bit | read_not_write, | ||
input bit | write_data[32], | ||
output bit | data_out[32] | ||
) |
module se_sram_srw_16384x32_we8 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[14], | ||
input bit | read_not_write, | ||
input bit | write_enable[4], | ||
input bit | write_data[32], | ||
output bit | data_out[32] | ||
) |
module se_sram_srw_16384x40 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[14], | ||
input bit | read_not_write, | ||
input bit | write_data[40], | ||
output bit | data_out[40] | ||
) |
module se_sram_srw_16384x8 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[14], | ||
input bit | read_not_write, | ||
input bit | write_enable, | ||
input bit | write_data[8], | ||
output bit | data_out[8] | ||
) |
module se_sram_srw_256x40 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[8], | ||
input bit | read_not_write, | ||
input bit | write_data[40], | ||
output bit | data_out[40] | ||
) |
module se_sram_srw_256x7 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[8], | ||
input bit | read_not_write, | ||
input bit | write_data[7], | ||
output bit | data_out[7] | ||
) |
module se_sram_srw_32768x32 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[15], | ||
input bit | read_not_write, | ||
input bit | write_enable, | ||
input bit | write_data[32], | ||
output bit | data_out[32] | ||
) |
module se_sram_srw_32768x64 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[15], | ||
input bit | read_not_write, | ||
input bit | write_enable, | ||
input bit | write_data[64], | ||
output bit | data_out[64] | ||
) |
module se_sram_srw_65536x32 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[16], | ||
input bit | read_not_write, | ||
input bit | write_enable, | ||
input bit | write_data[32], | ||
output bit | data_out[32] | ||
) |
module se_sram_srw_65536x8 | ( | clock | sram_clock, |
input bit | select, | ||
input bit | address[16], | ||
input bit | read_not_write, | ||
input bit | write_enable, | ||
input bit | write_data[8], | ||
output bit | data_out[8] | ||
) |