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enum | t_riscv_clock_phase {
rcp_clock_high,
rcp_dread_in_progress,
rcp_dwrite_in_progress,
rcp_ifetch_in_progress,
rcp_clock_low,
rcp_ifetch_first16_in_progress,
rcp_ifetch_second16_in_progress
} |
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enum | t_ifetch_src {
ifetch_src_sram,
ifetch_src_reg,
ifetch_src_reg16
} |
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enum | t_data_src {
data_src_sram,
data_src_reg,
data_src_access
} |
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enum | t_riscv_clock_action {
riscv_clock_action_rise,
riscv_clock_action_fall,
riscv_clock_action_ifetch,
riscv_clock_action_dread,
riscv_clock_action_dwrite,
riscv_clock_action_wait,
riscv_clock_action_ifetch_first16,
riscv_clock_action_ifetch_second16
} |
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