CDL Modules
|
Files | |
file | bbc_micro_de1_cl.cdl |
BBC microcomputer with RAMs for the CL DE1 + daughterboard. | |
module bbc_micro_de1_cl_io::bbc_micro_de1_cl_io | ( | clock | clk, |
clock | video_clk, | ||
input bit | reset_n, | ||
input bit | bbc_reset_n, | ||
input bit | framebuffer_reset_n, | ||
input bit | keys[4], | ||
input bit | switches[10], | ||
input t_bbc_clock_control | clock_control, | ||
output t_bbc_keyboard | bbc_keyboard, | ||
output t_video_bus | video_bus, | ||
output t_csr_request | csr_request, | ||
input t_csr_response | csr_response, | ||
input t_ps2_pins | ps2_in, | ||
output t_ps2_pins | ps2_out, | ||
input t_de1_cl_inputs_status | inputs_status, | ||
output t_de1_cl_inputs_control | inputs_control, | ||
output bit | lcd_source, | ||
output bit | leds[10], | ||
output bit | led_chain | ||
) |
[in] | clk | 50MHz clock from DE1 clock generator |
[in] | video_clk | 9MHz clock from PLL, derived from 50MHz |
[in] | reset_n | hard reset from a pin - a key on DE1 |
[in] | ps2_in | PS2 input pins |
[out] | ps2_out | PS2 output pin driver open collector |
[in] | inputs_status | DE1 CL daughterboard shifter register etc status |
[out] | inputs_control | DE1 CL daughterboard shifter register control |