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CDL Modules
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BBC micro display to SRAM write interface module. More...
BBC micro display to SRAM write interface module.
Copyright (C) 2016-2017, Gavin J Stark. All rights reserved.
Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
CDL implementation of a module to map from the t_bbc_display interface to an SRAM write interface, hence supporting a simple framebuffer for the output displayed by a BBC micro. The module requires configuration at run-time, so has a CSR request/response bus, and hence uses the csr_interface.
The basic operation is to gather together pixel data along a display line and generate SRAM writes when enough pixels are gathered.
The sync signals are used to determine where a field and where a line starts; pixels are captured after the 'back porch' of a line up to a certain amount of SRAM writes (16 pixels each) per line.
Interlace is supported - if the vsync occurs at non-consistent points in a line then it is deemed to be indicating odd or even field; the SRAM is then written in alternate lines.
This module needs an update to support an 'amount to add per line', and a register of 'address at start of line' - this will help support teletext better.
Copyright (C) 2016-2017, Gavin J Stark. All rights reserved.
Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
CDL implementation of a module to map from the t_bbc_display interface to an SRAM write interface, hence supporting a simple framebuffer for the output displayed by a BBC micro. The module requires configuration at run-time, so has a CSR request/response bus, and hence uses the bbc_csr_interface.
The basic operation is to gather together pixel data along a display line and generate SRAM writes when enough pixels are gathered.
The sync signals are used to determine where a field and where a line starts; pixels are captured after the 'back porch' of a line up to a certain amount of SRAM writes (16 pixels each) per line.
Interlace is supported - if the vsync occurs at non-consistent points in a line then it is deemed to be indicating odd or even field; the SRAM is then written in alternate lines.
This module needs an update to support an 'amount to add per line', and a register of 'address at start of line' - this will help support teletext better.
Data Structures | |
| struct | bbc_display_sram::t_display_combs |
| struct | bbc_display_sram::t_display_state |
| struct | bbc_display_sram::t_csrs |
| struct | bbc_display_sram::t_sram_combs |
| struct | bbc_display_sram::t_sram_state |
Namespaces | |
| bbc_display_sram | |
Typedefs | |
| typedef bit[pixel_counter_width] | bbc_display_sram::t_pixel_counter |
Variables | |
| constant integer | bbc_display_sram::pixel_counter_width =11 |
1.8.11
