CDL Modules
video.h
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1 
32 /*a Includes */
33 
34 /*a Types */
35 /*t t_video_bus */
36 typedef struct {
37  bit vsync "Asserted for one whole line at start of back porch of frame, simultaneous with hsync";
38  bit hsync "Asserted for one cycle at start of back porch";
39  bit display_enable "Asserted after end of back porch for display pixels/lines";
40  bit[8] red;
41  bit[8] green;
42  bit[8] blue;
43 } t_video_bus;
44 
45 /*t t_adv7123
46  *
47  */
48 typedef struct {
49  bit vs "Vsync asserted for n horizontal lines";
50  bit hs "Hsync asserted for n cycles to start retrace and the end of a line";
51  bit blank_n "Drive high for RGB out to come from red/green/blue; low for RGB to be blanking level";
52  bit sync_n "Composite sync, drive low if sync-on-green is not required, should only be driven low in blanking";
53  bit[10] red "Red data, latched on rising clock";
54  bit[10] green "Green data, latched on rising clock";
55  bit[10] blue "Blue data, latched on rising clock";
56 } t_adv7123;
57 
bit[8] red
Definition: video.h:40
bit[8] blue
Definition: video.h:42
Definition: video.h:36
Definition: video.h:48
bit[8] green
Definition: video.h:41