CDL Modules
Files
saa5050

Files

file  saa5050.cdl
 CDL implementation of Mullard SAA5050.
 

Detailed Description

Modules

module saa5050::saa5050 ( clock  clk_2MHz,
input bit  clk_1MHz_enable,
input bit  reset_n,
input bit  superimpose_n,
input bit  data_n,
input bit  data_in[7],
input bit  dlim,
input bit  glr,
input bit  dew,
input bit  crs,
input bit  bcs_n,
output bit  tlc_n,
input bit  lose,
input bit  de,
input bit  po,
output bit  red[6],
output bit  green[6],
output bit  blue[6],
output bit  blan,
input t_bbc_micro_sram_request  host_sram_request 
)

This module instantiates the teletext module to provide a teletext decoder that is compatible with the SAA5050 as it is used in the BBC microcomputer (i.e. some features of the chip are not supported, such as superimpose).

Parameters
[in]clk_2MHzSupposedly 6MHz pixel clock (TR6), except we use 2MHz and deliver 3 pixels per tick; rising edge should be coincident with clk_1MHz edges
[in]clk_1MHz_enableClock enable high for clk_2MHz when the SAA's 1MHz would normally tick
[in]reset_nActive low reset
[in]superimpose_nNot implemented
[in]data_nSerial data in, not implemented
[in]data_inParallel character data in
[in]dlimNot implemented, clocks serial data in somehow
[in]glrGeneral line reset, can be tied to hsync - assert once per line before data comes in
[in]dewData entry window - used to determine flashing rate and resets the ROM decoders - can be tied to vsync
[in]crsCharacter rounding select - drive high on even interlace fields to enable use of rounded character data (kinda indicates 'half line')
[in]bcs_nAssert (low) to enable double-height characters (?)
[out]tlc_nAsserted (low) when double-height characters occur (?)
[in]loseLoad output shift register enable - must be low before start of character data in a scanline, rising with (or one tick earlier?) the data; changes off falling F1, rising clk_1MHz
[in]deDisplay enable
[in]poPicture on
[out]redRed pixels out, 6 per 2MHz clock tick
[out]greenGreen pixels out, 6 per 2MHz clock tick
[out]blueBlue pixels out, 6 per 2MHz clock tick
[out]blanNot implemented
[in]host_sram_requestWrite only, writes on clk_2MHz rising, acknowledge must be handled by supermodule