CDL Modules
Files
apb_target_timer

Files

file  apb_target_timer.cdl
 Simple timer target for an APB bus.
 

Detailed Description

Modules

module apb_target_timer::apb_target_timer ( clock  clk,
input bit  reset_n,
input t_apb_request  apb_request,
output t_apb_response  apb_response,
output bit  timer_equalled[3] 
)

Simple timer with an APB interface. This is a monotonically increasing 31-bit timer with three 31-bit comparators.

The timers are read/written through the APB interface with the timer value read-only at address 0.

The three comparators are at addresses 4, 5 and 6. When a comparator is written it writes the 31-bit comparator value and it clears the timer's equalled bit. When a comparator is read it returns the comparator value (in bits [31;0]), and it returns the equalled status in bit [31] - while atomically clearing it.

Parameters
[in]clkSystem clock
[in]reset_nActive low reset
[in]apb_requestAPB request
[out]apb_responseAPB response
[out]timer_equalledOne output bit per timer, mirroring the three timer's equalled state