apb_target_gpio

Files
file	apb_target_gpio.cdl
	Simple GPIO target for an APB bus.

Detailed Description

Modules

module apb_target_gpio::apb_target_gpio	(	clock	clk,
		input bit	reset_n,
		input t_apb_request	apb_request,
		output t_apb_response	apb_response,
		output bit	gpio_output[16],
		output bit	gpio_output_enable[16],
		input bit	gpio_input[16],
		output bit	gpio_input_event
	)

Simple APB interface to a GPIO system.

The module has 16 outputs, each with separate enables which reset to off; it also has 16 inputs, each of which is synced and then edge detected (or other configured event).

This module has four APB-addressable registers:

• OutputControl (0):

  Each output (16 of them) has 2 bits; bit 0 is used for GPIO output 0 value, and bit 1 is used for its enable. Bits 2 and 3 are used for GPIO output 1, and so on.

• InputStatus (1):

  This register contains the input pin values and the event status for the 16 GPIO inputs. The bottom 16 bits contain the input pin value for each of the 16 inputs; the top 16 bits contain the event status.

• InputReg0 (2):

  On reads, this register contains the input pin event types for input pins - see the t_gpio_input_type for the decode; bits [3;0] are used for GPIO 0, [3;4] for GPIO1, and so on up to [3;28] for GPIO7. On writes, this register writes a single GPIO input control: bits[4;0] contain the GPIO input to control; and bits [3;12] contain the event type - which is only written if bit[8] is set; and if bit[9] then the input event is cleared.

• InputReg1 (3):

  This register contains the input pin event types for the top 8 GPIO pins, in a manner identical to InputReg0.

Parameters

[in]	clk	System clock
[in]	reset_n	Active low reset
[in]	apb_request	APB request
[out]	apb_response	APB response
[out]	gpio_output	GPIO output values, if gpio_output_enable is set
[out]	gpio_output_enable	GPIO output enables
[in]	gpio_input	GPIO input pin connections
[out]	gpio_input_event	Driven high when at least one GPIO input event has occurred, for use as an interrupt to a CPU