framebuffer_timing.cdl File Reference

Framebuffer timing module to create sync and display signals. More...

Detailed Description

Framebuffer timing module to create sync and display signals.

Copyright

(C) 2016-2017, Gavin J Stark. All rights reserved.

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0. Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

CDL implementation of a module that takes SRAM writes into a framebuffer, and includes a mapping to a dual-port SRAM (write on one side, read on the other), where the video side drives out vsync, hsync, data enable and pixel data.

Data Structures
struct	framebuffer_timing::t_video_combs
struct	framebuffer_timing::t_video_state
struct	framebuffer_timing::t_csrs

Namespaces
	framebuffer_timing

Enumerations
enum	framebuffer_timing::t_csr_address {   framebuffer_timing::csr_address_display_size = 0,   framebuffer_timing::csr_address_h_porch = 1,   framebuffer_timing::csr_address_v_porch = 2 }
enum	framebuffer_timing::t_display_fsm {   framebuffer_timing::state_back_porch,   framebuffer_timing::state_display,   framebuffer_timing::state_front_porch }