CDL Modules
csr_interface.h
Go to the documentation of this file.
1 
23 /*a Includes */
24 include "apb.h"
25 
26 /*a Types */
27 /*t t_csr_request */
61 typedef struct {
62  bit valid;
64  bit[16] select;
65  bit[16] address;
66  bit[32] data;
68 
69 /*t t_csr_response */
82 typedef struct {
86  bit[32] read_data;
88 
89 /*t t_csr_access */
102 typedef struct {
103  bit valid;
105  bit[16] address;
106  bit[32] data;
107 } t_csr_access;
108 
109 /*t t_csr_access_data */
115 typedef bit[32] t_csr_access_data;
116 
117 
118 /*a Modules */
119 /*m csr_target_apb
120  *
121  * CSR target that drives an APB
122  *
123  */
124 extern
125 module csr_target_apb( clock clk "Clock for the CSR interface, possibly gated version of master CSR clock",
126  input bit reset_n "Active low reset",
127  input t_csr_request csr_request "Pipelined csr request interface input",
128  output t_csr_response csr_response "Pipelined csr request interface response",
129  output t_apb_request apb_request "APB request to target",
130  input t_apb_response apb_response "APB response from target",
131  input bit[16] csr_select "Hard-wired select value for the client"
132  )
133 {
134  timing to rising clock clk csr_request, csr_select;
135  timing from rising clock clk csr_response;
136 
137  timing from rising clock clk apb_request;
138  timing to rising clock clk apb_response;
139 }
140 
141 /*m csr_target_csr
142  *
143  * CSR target that drives a CSR access (select, read, write, data)
144  *
145  */
146 extern
147 module csr_target_csr( clock clk "Clock for the CSR interface, possibly gated version of master CSR clock",
148  input bit reset_n "Active low reset",
149  input t_csr_request csr_request "Pipelined csr request interface input",
150  output t_csr_response csr_response "Pipelined csr request interface response",
151  output t_csr_access csr_access "Registered CSR access request to client",
152  input t_csr_access_data csr_access_data "Read data valid combinatorially based on csr_access",
153  input bit[16] csr_select "Hard-wired select value for the client"
154  )
155 {
156  timing to rising clock clk csr_request, csr_select;
157  timing from rising clock clk csr_response;
158 
159  timing from rising clock clk csr_access;
160  timing to rising clock clk csr_access_data;
161 }
162 
163 /*m csr_master_apb
164  *
165  * APB target that drive a CSR master
166  *
167  */
168 extern
169 module csr_master_apb( clock clk "Clock for the CSR interface; a superset of all targets clock",
170  input bit reset_n "Active low reset",
171  input t_apb_request apb_request "APB request from master",
172  output t_apb_response apb_response "APB response to master",
173  input t_csr_response csr_response "Pipelined csr request interface response",
174  output t_csr_request csr_request "Pipelined csr request interface output"
175  )
176 {
177  timing to rising clock clk csr_response;
178  timing from rising clock clk csr_request;
179 
180  timing to rising clock clk apb_request;
181  timing from rising clock clk apb_response;
182 }
183 
184 /*m csr_target_timeout
185  *
186  * CSR target that implements a timeout
187  *
188  * One of these can be placed on a CSR bus tree to terminate transactions that never complete
189  *
190  */
191 extern
192 module csr_target_timeout( clock clk "Clock for the CSR interface, possibly gated version of master CSR clock",
193  input bit reset_n "Active low reset",
194  input t_csr_request csr_request "Pipelined csr request interface input",
195  output t_csr_response csr_response "Pipelined csr request interface response",
196  input bit[16] csr_timeout "Number of cycles to wait for until auto-acknowledging a request"
197  )
198 {
199  timing to rising clock clk csr_request, csr_timeout;
200  timing from rising clock clk csr_response;
201 }
module csr_target_timeout(clock clk, input bit reset_n, input t_csr_request csr_request, output t_csr_response csr_response, input bit[16] csr_timeout)
Definition: csr_interface.h:192
Definition: csr_interface.h:61
bit[32] read_data
Definition: csr_interface.h:86
bit[16] select
Definition: csr_interface.h:64
Definition: csr_interface.h:82
bit[32] t_csr_access_data
Definition: csr_interface.h:115
Definition: apb.h:26
bit read_data_error
Definition: csr_interface.h:85
bit read_data_valid
Definition: csr_interface.h:84
bit valid
Definition: csr_interface.h:62
bit[16] address
Definition: csr_interface.h:105
Definition: csr_interface.h:102
module csr_target_apb(clock clk, input bit reset_n, input t_csr_request csr_request, output t_csr_response csr_response, output t_apb_request apb_request, input t_apb_response apb_response, input bit[16] csr_select)
Definition: csr_interface.h:125
module csr_master_apb(clock clk, input bit reset_n, input t_apb_request apb_request, output t_apb_response apb_response, input t_csr_response csr_response, output t_csr_request csr_request)
Definition: csr_interface.h:169
Definition: apb.h:35
bit[16] address
Definition: csr_interface.h:65
bit read_not_write
Definition: csr_interface.h:63
bit[32] data
Definition: csr_interface.h:106
bit acknowledge
Definition: csr_interface.h:83
bit read_not_write
Definition: csr_interface.h:104
bit valid
Definition: csr_interface.h:103
bit[32] data
Definition: csr_interface.h:66
module csr_target_csr(clock clk, input bit reset_n, input t_csr_request csr_request, output t_csr_response csr_response, output t_csr_access csr_access, input t_csr_access_data csr_access_data, input bit[16] csr_select)
Definition: csr_interface.h:147