bbc_micro_rams.cdl File Reference

BBC microcomputer RAMs module. More...

Detailed Description

BBC microcomputer RAMs module.

Copyright (C) 2016-2017, Gavin J Stark. All rights reserved.

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

CDL implementation of RAMs to enable a BBC microcomputer to be mapped to simulation or FPGA.

This module provides SRAMs for a display frame buffer and for floppy disks, to enable a BBC microcomputer emulation cleanly. These memories must be programmable in an FPGA, as must the BBC microcomputer memories. For this purpose, this module takes a host SRAM request/response interface, and allows for reading/writing the display framebuffer and floppy RAMs. It also provides a bridge to reading/writing the BBC microcomputer RAMs through the same kinds of interface - hence in an FPGA the host SRAM bus connects only to this module, and this module masters accesses to the BBC microcomputer SRAMs.

Data Structures
struct	bbc_micro_rams::t_sram_inputs

Namespaces
	bbc_micro_rams

Enumerations
enum	bbc_micro_rams::t_host_grant {   bbc_micro_rams::host_grant_none,   bbc_micro_rams::host_grant_display,   bbc_micro_rams::host_grant_floppy,   bbc_micro_rams::host_grant_bbc_micro }