bbc_micro_clocking.cdl File Reference

BBC microcomputer clock generation module. More...

Detailed Description

BBC microcomputer clock generation module.

Copyright (C) 2016-2017, Gavin J Stark. All rights reserved.

Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

CDL implementation of clock generation for the BBC microcomputer implementation.

This module provides for a controllable clock source for the BBC microcomputer implementation. A standard BBC microcomputer would use a clock here of 4MHz, and the CPU would clock on every clock edge. However, FPGAs are capable of running much faster, and this module expects a clock of 'N' MHz, and it can be configured to provide the BBC micro cpu with a clock edge at 2MHz as originally designed, with the standard 2MHz video clock and 1MHz peripheral clocks; it can also be configured to run the CPU at 'N/2' MHz, while maintaining the 2MHz video and 1MHz peripheral clocks - hence supporting 'compatibility with extra speed'...

This module is configured through the csr request/response interface, and hence uses bbc_csr_interface.

Data Structures
struct	bbc_micro_clocking::t_clock_comb
struct	bbc_micro_clocking::t_control
struct	bbc_micro_clocking::t_divider

Namespaces
	bbc_micro_clocking